HeVac: A Heterogeneous Vacation Scheme for Thermal-Aware Multicore Packet Processing

As processor power density increases, thermal and power control becomes critical for packet processing. Network applications feature ON/OFF execution pattern, which causes frequent temperature and power consumption changes in the processor. In this paper, we propose a novel power aware thermal management algorithm, which achieves power saving in multicore processors by employing a vacation scheme. We implement the scheme through the idle states (C-state) provided by the OS in CPU and show their effectiveness through experimental data. Also, the performance of the vacation scheme is analyzed based on the vacation queuing theory. Then, we propose a heterogeneous load distribution, which creates more opportunities for power saving and temperature reduction. Finally, we design, implement and evaluate an online scheduling algorithm to dynamically choose the best configuration of load distribution and vacation period under real world traffic trace. The technique maintains processor temperature below the temperature constraint and achieves power saving with minimum latency increase. To the best of our knowledge, this is the first work to discuss and develop vacation algorithm considering all power, temperature and latency in the packet processing on a general purpose multicore processor. Keywords—Network application; Packet processing, multicore processors, Power saving, Thermal aware technique, vacation and runtime adaptation.